LinuxCommandLibrary

spike

Simulate RISC-V instructions and execute programs

TLDR

Create a new project using the default template

$ spike new [project_name]
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Compile your project, watch for changes, and auto-reload the browser
$ spike watch
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Compile your project once to the "public" directory
$ spike compile
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Remove the output directory
$ spike clean
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SYNOPSIS

spike [OPTIONS] ELF_FILE [ARGS...]
spike [OPTIONS] --dtb
spike [OPTIONS] --dump-dts

PARAMETERS

--isa=
    Specify the RISC-V ISA string to simulate (e.g., RV64IMAFDVC).

--priv=
    Set the initial privilege mode for simulation (e.g., M, S, U for Machine, Supervisor, User).

--mem=
    Define a custom memory region for the simulated system (e.g., 0x80000000:0x10000000).

-p or --procs=
    Simulate a system with N number of RISC-V processors (HARTs).

-d or --debug
    Enter the interactive debugger mode upon starting the simulation.

-l or --log
    Log every executed instruction to standard error (stderr).

--gdb-port=
    Start a GDB remote debugging server on the specified TCP port.

--pk or --no-pk
    Enable or disable the preloading of the RISC-V proxy kernel (pk).

--varch=
    Specify the vector architecture configuration, defining vector register length (VLEN) and element length (ELEN).

--device-tree-source=
    Use a custom device tree source file (.dts) instead of generating one.

--device-tree-blob=
    Use a custom compiled device tree blob file (.dtb).

--dtb
    Generate a default device tree blob based on configured parameters and exit.

--dump-dts
    Dump the generated device tree source to standard output and exit.

--log-file=
    Direct all log output to the specified file instead of stderr.

DESCRIPTION

spike is the functional RISC-V Instruction Set Architecture (ISA) simulator, primarily used for developing and testing RISC-V software. It allows developers to run RISC-V compiled programs on a host machine (like x86-64) without requiring actual RISC-V hardware. This makes it an invaluable tool for early-stage software development, ISA research, and debugging. spike accurately models the RISC-V architecture, including its various extensions (e.g., M, A, F, D, V), privilege modes, and memory management units. It often works in conjunction with the RISC-V proxy kernel (pk) to provide a basic execution environment for user-space applications. It supports various debugging features and allows detailed logging of instruction execution and architectural state.

CAVEATS

  • spike is a functional simulator, meaning it prioritizes correct instruction execution and architectural behavior over cycle-accurate timing.
  • It typically requires a compiled RISC-V ELF binary, which is usually generated using the riscv-gnu-toolchain.
  • For complex applications or OSes, the RISC-V proxy kernel (pk) or a full OS image is often necessary.
  • Simulation performance is significantly slower than native execution or real hardware.
  • <B>PROXY KERNEL (PK)</B>

    Many spike executions, especially for user-space applications, rely on the RISC-V proxy kernel (pk). The pk provides a lightweight, bare-metal environment that offers system calls (like file I/O, memory allocation) by proxying them to the host operating system. This allows RISC-V applications to run with minimal porting effort.

    <B>DEBUGGING WITH GDB</B>

    spike can be started with the --gdb-port option to open a GDB remote debugging stub. This enables developers to use the standard GNU Debugger (gdb) to connect to the running spike instance, inspect registers, memory, set breakpoints, and step through RISC-V code, significantly aiding in software debugging.

    HISTORY

    spike was developed by the RISC-V Foundation (now RISC-V International) as the reference functional simulator for the RISC-V ISA. It originated early in the RISC-V project's history, alongside the specification itself, to provide a rapid prototyping and software development platform before hardware implementations became widely available. Its development is ongoing, evolving with the RISC-V specification to support new extensions and features. It serves as a crucial component of the RISC-V software ecosystem, underpinning much of the early software porting and validation efforts.

    SEE ALSO

    riscv-gnu-toolchain, qemu-system-riscv64, gdb(1), objdump(1)

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