intel_error_decode
Decode Intel machine check errors
SYNOPSIS
intel_error_decode MCi_STATUS_VALUE [MCi_MISC_VALUE]
PARAMETERS
MCi_STATUS_VALUE
The 64-bit hexadecimal value from the MCi_STATUS register. This value contains the primary error code and status flags.
MCi_MISC_VALUE
(Optional) The 64-bit hexadecimal value from the MCi_MISC register. This register provides additional, often CPU-specific, information about the error.
DESCRIPTION
intel_error_decode is a specialized Linux utility used to decode machine check error (MCE) register values reported by Intel CPUs. When a CPU encounters a severe hardware error, it logs details into specific Model-Specific Registers (MSRs), primarily the MCi_STATUS and MCi_MISC registers.
This command takes the raw hexadecimal values from these registers and translates them into a human-readable format, providing insights into the type, scope, and severity of the error. It's an invaluable tool for system administrators and hardware engineers to diagnose CPU-related issues, such as cache errors, bus errors, or TLB errors, which are critical for system reliability and stability. It typically works in conjunction with systems that collect MCE data, like the rasdaemon utility.
CAVEATS
The output of intel_error_decode can be highly technical and requires a strong understanding of Intel CPU architecture and machine check error terminology. The exact interpretation of some fields might vary slightly between different Intel CPU generations or families.
This utility typically decodes raw register values; for automated collection and parsing of MCE logs, tools like rasdaemon and ras-mc_decode are more commonly used as wrappers.
HISTORY
intel_error_decode is often associated with the rasdaemon project, which was developed to provide a modern, more robust alternative to the older mcelog utility for handling Reliability, Availability, and Serviceability (RAS) features on Linux systems. It specifically focuses on Intel CPU error decoding, leveraging detailed Intel documentation for accurate error interpretation. Its development is ongoing as new CPU architectures are introduced.
SEE ALSO
rasdaemon(8), ras-mc_decode(1), mcelog(8), dmesg(1)