LinuxCommandLibrary

ghdl

Analyze, compile, and simulate VHDL designs

TLDR

Analyze a VHDL source file and produce an object file

$ ghdl -a [filename.vhdl]
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Elaborate a design (where design is the name of a configuration unit, entity unit, or architecture unit)
$ ghdl -e [design]
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Run an elaborated design
$ ghdl -r [design]
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Run an elaborated design and dump output to a waveform file
$ ghdl -r [design] --wave=[output.ghw]
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Check the syntax of a VHDL source file
$ ghdl -s [filename.vhdl]
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Display help
$ ghdl --help
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SYNOPSIS

ghdl [OPTION...] COMMAND [VHDL-files]

PARAMETERS

-a, --analyse
    Analyze VHDL files into a library

-e, --elaborate=unit
    Elaborate a design unit into an executable

-r, --run[=unit]
    Run simulation of elaborated unit

-c
    Cascade: analyze, elaborate, and run

--std=87|93|02|08
    Set VHDL standard (default: 08)

-Idir
    Add directory to library search path

--work=name
    Set work library name (default: work)

-g
    Use GCC backend for elaboration

--llvm
    Use LLVM backend (recommended for speed)

--mcode
    Use mcode backend (pure interpretative)

-i, --identify
    List design units in libraries

--clean
    Remove generated files

--remove
    Remove library objects

-fexplicit
    Read command options from file

-v, --version
    Display version info

-h, --help
    Show full help

DESCRIPTION

GHDL is an open-source tool for analyzing, compiling, elaborating, and simulating VHDL hardware description language designs. It supports VHDL standards from '87 to 2008, including Subset 1076 for synthesis. Portable across Linux, Windows, and macOS, GHDL uses backends like LLVM, GCC, or mcode for code generation and simulation.

Workflow typically involves: -a to analyze source files into libraries, -e to elaborate a design unit into an executable, and -r to run the simulation. It excels in verification of digital circuits for FPGA/ASIC development, offering zero-cost abstractions and high performance via LLVM. GHDL integrates with synthesis tools like Yosys and can generate VCD waveforms for viewing in GTKWave.

No commercial license needed; ideal for education, research, and professional use in hardware design flows.

CAVEATS

VHDL source files required; simulation-only (use Yosys for synthesis). LLVM backend needs libllvm installed. Large designs may need increased stack size.

TYPICAL WORKFLOW

ghdl -a --std=08 my_design.vhd
ghdl -e --std=08 my_design
ghdl -r my_design --vcd=wave.vcd

BACKENDS COMPARISON

LLVM: fastest, JIT-capable.
GCC: portable, good debug.
mcode: no dependencies, slowest.

HISTORY

Started in 2001 by Tristan Gingold as a VHDL '87 simulator. Evolved to support later standards; switched to LLVM backend in v1.0 (2020) for performance. Maintained by the GHDL community on GitHub.

SEE ALSO

gtkwave(1), yosys(1), iverilog(1)

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