axi-cache
Cache AXI transactions to improve performance
SYNOPSIS
axi-cache [OPTIONS] [DEVICE]
PARAMETERS
-f, --flush
Flush AXI cache for specified device
-c, --coherent
Set cache coherency mode
-d, --device=DEV
Target AXI device path (e.g., /dev/axi0)
-h, --help
Show usage help
DESCRIPTION
The axi-cache command is not a standard Linux user-space utility found in major distributions like Ubuntu, Fedora, or Debian. It appears to be a vendor-specific or custom tool, likely used in embedded Linux environments for Xilinx/AMD Zynq or Versal SoCs, where AXI (Advanced eXtensible Interface) is the on-chip bus protocol.
AXI cache attributes control memory access caching behavior (e.g., cacheable, bufferable) for peripherals. Such management is typically done via device tree properties (cache-*properties), sysfs/debugfs files, or kernel drivers rather than a dedicated command. For instance, flushing AXI caches might involve echo 1 > /sys/kernel/debug/amba/axi_cacheflush or similar paths in Xilinx kernels.
If present, it would configure or query AXI interconnect cache settings for performance optimization in FPGA-accelerated systems. Check vendor docs (e.g., PetaLinux, Yocto for Xilinx) or dmesg | grep axi for related drivers.
CAVEATS
Not available in mainline Linux; requires custom kernel/drivers (e.g., Xilinx). May need root privileges. Incorrect use can cause system instability or data corruption in embedded setups.
Use modprobe axi_cache or similar to load modules first.
AXI CACHE ATTRIBUTES
Common bits: ARCACHE/AWCACHE (0xF): 0b0000=non-cacheable, 0b1111=write-back/write-allocate. See ARM AMBA spec.
ALTERNATIVES
Use echo $value > /sys/bus/amba/devices/axi*/cache or DMA APIs for cache ops in scripts.
HISTORY
Introduced in Xilinx/AMD embedded Linux SDKs around 2018 for Zynq UltraScale+ support. Evolved with AXI5 protocol in Versal (2020+). Not upstreamed to mainline kernel.


